An Enhanced Meta Heuristic Model for Reduction of Energy Consumption in Embedded Systems

In the multiprocessing embedded framework the productive utilization of the on-chip and off-chip memory code repositioning is done. For the purpose of improvement in the embedded system the SPM and cache is used for the code processing. The code layout is developed to place the code in memory for preventing the cache conflicts and misses. Even though many researchers have illustrated the use of SPM and cache to improve the efficiency, hybrid approach of combining these two methods was not done. In this study the comparison of energy consumption is done with the help of three models namely ILP model, Heuristic model and two stage meta-heuristic models. Two stages Meta heuristic model is the proposed model in which along with the SPM and Cache, code layout is developed to place the code in it. The result reveals that compared to other two models the two stage meta-heuristic model yields more efficiency and consume less energy than other two models. As much as approximately 55% of additional energy can be saved by applying both code repositioning and SPM code selection techniques using the proposed model.